1. Technical Field
The present disclosure relates to a method for improving data processing in general and, in particular, to a method for executing speculative instructions within a processor. Still more particularly, the present disclosure relates to a method for selectively executing speculative load instructions within a high-performance processor such that wrongful displacement of useful data in a data cache can be avoided.
2. Description of the Related Art
A high-performance processor achieves high instruction throughput by fetching and dispatching instructions under the assumption that branches are correctly predicted and allows instructions to execute without waiting for the completion of previous instructions. This is commonly known as speculative execution. Typically, the processor executes instructions speculatively when it has resources that would otherwise be idle, so that the operation may be done at minimum or no cost. If subsequent events indicate that the speculative instruction should not have been executed, the processor simply abandons any result that the speculative instruction produced.
Most operations can be performed speculatively, as long as the processor appears to follow a simple sequential method such as those in a scalar processor. For some applications, however, speculative operations can be a severe detriment to the performance of the processor. For example, in the case of executing a load instruction after a branch instruction (or known as speculative load because the load instruction is executed speculatively without knowing exactly which path of the branch would be taken), if the predicted execution path is incorrect, there is a high delay penalty associated with the pending speculative load in the instruction stream, requesting the required data from the system bus. In many applications, the rate of mispredicted branches is high enough that the cost of speculatively accessing the system bus is prohibitively expensive. Furthermore, essential data stored in a data cache may be displaced by some irrelevant data obtained from the system bus because of a wrongful execution of a speculative load instruction caused by misprediction.
Consequently, it would be desirable to provide a method for selectively executing speculative load instructions in a high-performance processor by utilizing a better prediction scheme.